const std = @import("std"); const common = @import("../common.zig"); const Mirroring = common.Mirroring; pub const Axrom = @This(); prg_bank: u4 = 0, mirroring_mode: Mirroring = .single_screen_lower, pub fn init() Axrom { return .{}; } pub fn cpuRead(self: *const Axrom, address: u16, prg_rom: []const u8, prg_ram: []const u8) ?u8 { if (address >= 0x6000 and address <= 0x7fff) { const offset = address - 0x6000; if (offset < prg_ram.len) return prg_ram[offset]; return 0; } if (address >= 0x8000 and address <= 0xffff) { const total_32k_banks = @max(1, prg_rom.len / 0x8000); const bank = @as(usize, self.prg_bank) % total_32k_banks; const offset = (bank * 0x8000) + (address - 0x8000); if (offset < prg_rom.len) return prg_rom[offset]; return 0; } return null; } pub fn cpuWrite(self: *Axrom, address: u16, value: u8, prg_ram: []u8) bool { if (address >= 0x6000 and address <= 0x7fff) { const offset = address - 0x6000; if (offset < prg_ram.len) { prg_ram[offset] = value; return true; } } if (address >= 0x8000 and address <= 0xffff) { self.prg_bank = @truncate(value & 0x0f); self.mirroring_mode = if ((value & 0x10) != 0) .single_screen_upper else .single_screen_lower; return true; } return false; } pub fn ppuRead(_: *const Axrom, address: u16, chr_rom: []const u8, chr_ram: []const u8, chr_is_ram: bool) ?u8 { if (address < 0x2000) { if (chr_is_ram) { if (address < chr_ram.len) return chr_ram[address]; } else { if (address < chr_rom.len) return chr_rom[address]; } return 0; } return null; } pub fn ppuWrite(_: *Axrom, address: u16, value: u8, chr_ram: []u8, chr_is_ram: bool) bool { if (address < 0x2000 and chr_is_ram) { if (address < chr_ram.len) { chr_ram[address] = value; return true; } } return false; } pub fn mirroring(self: *const Axrom) Mirroring { return self.mirroring_mode; } pub fn irqLine(_: *const Axrom) bool { return false; } pub fn notifyPpuAddress(_: *Axrom, _: u16) void {}