From a79e9c786296718ef7478486db9db477b67f86db Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Burak=20=C5=9Een?= Date: Mon, 10 Aug 2026 18:35:40 +0200 Subject: [PATCH] add functional and nestest conformance test suite --- build.zig | 42 +- src/cpu/m6502/conformance.zig | 303 ++++++++ .../conformance/6502_functional_test.bin | Bin 0 -> 65536 bytes .../65C02_extended_opcodes_test.bin | Bin 0 -> 65536 bytes src/cpu/m6502/conformance/LICENCE | 674 ++++++++++++++++++ src/cpu/m6502/conformance/nestest.nes | Bin 0 -> 24592 bytes src/cpu/root.zig | 1 + 7 files changed, 1010 insertions(+), 10 deletions(-) create mode 100644 src/cpu/m6502/conformance.zig create mode 100644 src/cpu/m6502/conformance/6502_functional_test.bin create mode 100644 src/cpu/m6502/conformance/65C02_extended_opcodes_test.bin create mode 100644 src/cpu/m6502/conformance/LICENCE create mode 100644 src/cpu/m6502/conformance/nestest.nes diff --git a/build.zig b/build.zig index ff04347..4d3a85b 100644 --- a/build.zig +++ b/build.zig @@ -4,19 +4,41 @@ pub fn build(b: *std.Build) void { const target = b.standardTargetOptions(.{}); const optimize = b.standardOptimizeOption(.{}); - const exe = b.addExecutable(.{ - .name = "6soz", - .root_source_file = b.path("src/main.zig"), + const cpu_mod = b.createModule(.{ .target = target, .optimize = optimize, + .root_source_file = b.path("src/cpu/root.zig"), }); - b.installArtifact(exe); - - const test_step = b.step("test", "Run unit tests"); - const exe_tests = b.addTest(.{ - .root_module = exe.root_module, + const system_mod = b.createModule(.{ + .target = target, + .optimize = optimize, + .root_source_file = b.path("src/system/root.zig"), }); - const run_exe_tests = b.addRunArtifact(exe_tests); - test_step.dependOn(&run_exe_tests.step); + + const platform_mod = b.createModule(.{ + .target = target, + .optimize = optimize, + .root_source_file = b.path("src/platform/root.zig"), + }); + + const frontend_mod = b.createModule(.{ + .target = target, + .optimize = optimize, + .root_source_file = b.path("src/frontend/root.zig"), + }); + + const exe_mod = b.createModule(.{ + .target = target, + .optimize = optimize, + .root_source_file = b.path("src/main.zig"), + }); + + const test_step = b.step("test", "Run 6soz tests"); + + inline for (&.{ cpu_mod, system_mod, platform_mod, frontend_mod, exe_mod }) |mod| { + const mod_test = b.addTest(.{ .root_module = mod }); + const mod_cmd = b.addRunArtifact(mod_test); + test_step.dependOn(&mod_cmd.step); + } } diff --git a/src/cpu/m6502/conformance.zig b/src/cpu/m6502/conformance.zig new file mode 100644 index 0000000..0e89999 --- /dev/null +++ b/src/cpu/m6502/conformance.zig @@ -0,0 +1,303 @@ +const std = @import("std"); +const testing = std.testing; + +const root = @import("root.zig"); +const Model = @import("types.zig").Model; +pub const Accuracy = root.Accuracy; + +/// Minimal 64KB RAM Bus for conformance testing. +/// Minimal test bus without unneeded dynamic allocations. +pub const TestBus = struct { + ram: [65536]u8 = [_]u8{0} ** 65536, + ticks: u64 = 0, + + pub fn read(self: *TestBus, address: u16) u8 { + return self.ram[address]; + } + + pub fn write(self: *TestBus, address: u16, value: u8) void { + self.ram[address] = value; + } + + pub fn tick(self: *TestBus) void { + self.ticks += 1; + } + + pub fn loadSlice(self: *TestBus, address: u16, data: []const u8) void { + @memcpy(self.ram[address .. address + data.len], data); + } +}; + +pub fn InstructionCpu(comptime model: Model) type { + return root.Cpu(TestBus, model, .instruction); +} + +pub fn CycleCpu(comptime model: Model) type { + return root.Cpu(TestBus, model, .cycle); +} + +pub const functional_test_bin = @embedFile("conformance/6502_functional_test.bin"); +pub const cmos_extended_test_bin = @embedFile("conformance/65C02_extended_opcodes_test.bin"); +pub const nestest_nes = @embedFile("conformance/nestest.nes"); + +/// Runs a binary ROM conformance test against a CPU model and memory harness. +pub fn runBinaryTest( + comptime model: Model, + comptime accuracy: Accuracy, + rom_data: []const u8, + load_address: u16, + start_pc: u16, + success_pc: u16, + max_instructions: u64, +) !void { + var bus = TestBus{}; + @memcpy(bus.ram[load_address .. load_address + rom_data.len], rom_data); + + var cpu = root.Cpu(TestBus, model, accuracy).init(&bus); + cpu.reset(); + cpu.registers.pc = start_pc; + + var previous_pc: u16 = 0; + var i: u64 = 0; + + while (i < max_instructions) : (i += 1) { + previous_pc = cpu.registers.pc; + _ = cpu.step() orelse break; + + if (cpu.registers.pc == success_pc) { + break; + } + + if (cpu.registers.pc == previous_pc) { + std.debug.print( + "\n[FAIL] Conformance test trapped in infinite loop at PC: 0x{X:0>4}\n", + .{cpu.registers.pc}, + ); + return error.FunctionalTestFailed; + } + } + + if (cpu.registers.pc != success_pc) { + std.debug.print( + "\n[TIMEOUT] Conformance test reached PC 0x{X:0>4} after {d} instructions\n", + .{ cpu.registers.pc, i }, + ); + return error.FunctionalTestTimeout; + } +} + +/// Runs Kevtris' nestest.nes ROM in automation mode (PC = $C000) for Ricoh 2A03/2A07 CPU cores. +pub fn runNesTest( + comptime model: Model, + comptime accuracy: Accuracy, + max_instructions: u64, +) !void { + var bus = TestBus{}; + // PRG ROM is 16KB starting at byte 16 (after 16-byte iNES header) + const prg = nestest_nes[16 .. 16 + 16384]; + bus.loadSlice(0x8000, prg); + bus.loadSlice(0xc000, prg); + + var cpu = root.Cpu(TestBus, model, accuracy).init(&bus); + cpu.reset(); + cpu.registers.pc = 0xc000; + + var previous_pc: u16 = 0; + var i: u64 = 0; + + while (i < max_instructions) : (i += 1) { + previous_pc = cpu.registers.pc; + _ = cpu.step() orelse break; + + if (cpu.registers.pc == previous_pc) break; + } + + const err1 = bus.read(0x0002); + const err2 = bus.read(0x0003); + if (err1 != 0 or err2 != 0) { + std.debug.print( + "\n[FAIL] Nestest failed with error codes $0002: 0x{X:0>2}, $0003: 0x{X:0>2} at PC 0x{X:0>4}\n", + .{ err1, err2, cpu.registers.pc }, + ); + return error.NestestFailed; + } +} + +// MOS 6502 +test "MOS 6502 Functional Test (Instruction Accuracy)" { + try runBinaryTest( + .mos6502, + .instruction, + functional_test_bin, + 0x0000, + 0x0400, + 0x3469, + 100_000_000, + ); +} + +test "MOS 6502 Functional Test (Cycle Accuracy)" { + try runBinaryTest( + .mos6502, + .cycle, + functional_test_bin, + 0x0000, + 0x0400, + 0x3469, + 100_000_000, + ); +} + +// MOS 6507 +test "MOS 6507 13-bit Address Bus Masking" { + var bus = TestBus{}; + bus.write(0x0123, 0x55); + + var cpu = InstructionCpu(.mos6507).init(&bus); + // Reading 0x2123 (0x2123 & 0x1FFF == 0x0123) wraps to 0x0123 on 13-bit bus + try testing.expectEqual(@as(u8, 0x55), cpu.readCycle(0x2123)); +} + +// MOS 6510 +test "MOS 6510 Functional Test (Instruction Accuracy)" { + try runBinaryTest( + .mos6510, + .instruction, + functional_test_bin, + 0x0000, + 0x0400, + 0x3469, + 100_000_000, + ); +} + +test "MOS 6510 Functional Test (Cycle Accuracy)" { + try runBinaryTest( + .mos6510, + .cycle, + functional_test_bin, + 0x0000, + 0x0400, + 0x3469, + 100_000_000, + ); +} + +// Ricoh 2A03 & 2A07 +test "Ricoh 2A03 Nestest Conformance (Instruction Accuracy)" { + try runNesTest(.ricoh2a03, .instruction, 100_000); +} + +test "Ricoh 2A03 Nestest Conformance (Cycle Accuracy)" { + try runNesTest(.ricoh2a03, .cycle, 100_000); +} + +test "Ricoh 2A07 Nestest Conformance (Instruction Accuracy)" { + try runNesTest(.ricoh2a07, .instruction, 100_000); +} + +test "Ricoh 2A07 Nestest Conformance (Cycle Accuracy)" { + try runNesTest(.ricoh2a07, .cycle, 100_000); +} + +// WDC 65C02 +test "WDC 65C02 Extended Opcodes Test (Instruction Accuracy)" { + try runBinaryTest( + .wdc65c02, + .instruction, + cmos_extended_test_bin, + 0x0000, + 0x0400, + 0x24f1, + 100_000_000, + ); +} + +test "WDC 65C02 Extended Opcodes Test (Cycle Accuracy)" { + try runBinaryTest( + .wdc65c02, + .cycle, + cmos_extended_test_bin, + 0x0000, + 0x0400, + 0x24f1, + 100_000_000, + ); +} + +// Rockwell R65C02 +test "Rockwell R65C02 Extended Opcodes Test (Instruction Accuracy)" { + try runBinaryTest( + .r65c02, + .instruction, + cmos_extended_test_bin, + 0x0000, + 0x0400, + 0x24f1, + 100_000_000, + ); +} + +test "Rockwell R65C02 Extended Opcodes Test (Cycle Accuracy)" { + try runBinaryTest( + .r65c02, + .cycle, + cmos_extended_test_bin, + 0x0000, + 0x0400, + 0x24f1, + 100_000_000, + ); +} + +// Save-State & Debug Hook Tests +test "Cpu Save-State Serialization (CpuSnapshot)" { + var bus = TestBus{}; + var cpu = InstructionCpu(.mos6502).init(&bus); + cpu.registers.a = 0x42; + cpu.registers.x = 0x13; + cpu.registers.pc = 0x8000; + cpu.cycles = 1234; + + const snap = cpu.saveState(); + + var cpu2 = InstructionCpu(.mos6502).init(&bus); + cpu2.loadState(snap); + + try testing.expectEqual(@as(u8, 0x42), cpu2.registers.a); + try testing.expectEqual(@as(u8, 0x13), cpu2.registers.x); + try testing.expectEqual(@as(u16, 0x8000), cpu2.registers.pc); + try testing.expectEqual(@as(u64, 1234), cpu2.cycles); +} + +test "Falling-Edge NMI Latching" { + var bus = TestBus{}; + var cpu = InstructionCpu(.mos6502).init(&bus); + + // Initial high level + cpu.setNmi(true); + try testing.expect(!cpu.nmi_latch); + + // Falling edge high -> low + cpu.setNmi(false); + try testing.expect(cpu.nmi_latch); +} + +test "Zero-Overhead Debug Hook (CpuWithHook)" { + var bus = TestBus{}; + bus.write(0x8000, 0xEA); // NOP + + const CounterHook = struct { + var steps: usize = 0; + pub fn onStep(_: anytype, pc: u16, _: u8, _: anytype) void { + _ = pc; + steps += 1; + } + }; + + var cpu = root.CpuWithHook(TestBus, .mos6502, .instruction, CounterHook).init(&bus); + cpu.registers.pc = 0x8000; + _ = cpu.step(); + + try testing.expectEqual(@as(usize, 1), CounterHook.steps); +} diff --git a/src/cpu/m6502/conformance/6502_functional_test.bin b/src/cpu/m6502/conformance/6502_functional_test.bin new file mode 100644 index 0000000000000000000000000000000000000000..c9a35e1d6bd2e7d85844da2abf7034d5ed820e6e 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If not, see . + +Also add information on how to contact you by electronic and paper mail. + + If the program does terminal interaction, make it output a short +notice like this when it starts in an interactive mode: + + Copyright (C) + This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, your program's commands +might be different; for a GUI interface, you would use an "about box". + + You should also get your employer (if you work as a programmer) or school, +if any, to sign a "copyright disclaimer" for the program, if necessary. +For more information on this, and how to apply and follow the GNU GPL, see +. + + The GNU General Public License does not permit incorporating your program +into proprietary programs. If your program is a subroutine library, you +may consider it more useful to permit linking proprietary applications with +the library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. But first, please read +. diff --git a/src/cpu/m6502/conformance/nestest.nes b/src/cpu/m6502/conformance/nestest.nes new file mode 100644 index 0000000000000000000000000000000000000000..fc2a88c36db9c5c2de9cca33be0e446e12007f17 GIT binary patch literal 24592 zcmeHue|%KcweOzHWCBTq0R%?*;jy5C6&xJYs1XJP5-`rPD_v}$T=9c&FbLGf6qP<_?(wPJv(V_PI7KIVSc-e+gdOv1hI z)6f0yB_wn9THm$TUVH7e*V^Zt;hOo2&vZCg-%r)Cw?mPGdgh6i0?pGaJ~(S+TBAd2 zETmtsbnOwhrZe%87!J5d>o9w^n#cLTs)B_2akrwP5k9@j=9VBGyR4H{&Az%!@C%wCu7ubFZ2=e}Ne6dA69MCggg5+B48F{yq2me3-CN!NCoX$^Ls20hSs z==~1!^YmfSf)qt*cltx2oDV}lhok`_UMF%bK_Xkto(}U^D1#pjKhvgZ*WbNLTe@&k;_?l*Imn()h}JQJf9t2S-*T)E_3m^r8RfvvgXv( z+j4qrHL_4-wpYipOUgt4NJaG<7Pwrkd1uC0M@$*+>TScqM& zEnIca(v|hgwAJCYXJ^=dwiMS~8_cz)YK}6)TEWHr7;~=@U9>5y!!@gyE!TYW=hjVC zYdi0%JcSDv&&?fSan-fCjO(lBNR&QT}j@_u*!!j zk&tB^2e6S2{jUFJ(T6@VCeVSumN9`v=kD(?k2mdap8vr)`(wY~{6SrFT_B*d&1|!0 z^9XI)ZtbJpTC83Bc#qcouJ*-VO@B{Y_rBJ80iVVzN(E;gFe?z&B^YRc}qse25Tb{l)r1)ErVhuIlAQkHb-j?L_d z7xgKyTQ5MfEbgqjdbjQ*Zrr82aOEuR(hI2(NIR?QcI$4@HeGs=Kuu@W{k!!c)W*an zJHjq~D2U09ptI`H-FmSQA|U9}O9T*hR=v1eFBO2trJqKPsK;6Lhu!)x(e}CY;R5vu zrU&hirJb{~NcWJssb3na(=L4kNd-vxLGJMi_A;o z!nm{Q;&%OX;<+lPq=)*7!i7m^)xvgtG1wEt zDgZX!Yv^Z_F6s~^PYGxI$k4wfx&PMZpe93~WT}7$ESJ76nJ^?^1bjo|MPfdtp-+Zr zt1+8aCQftzv!R~@mN6$?wJJM`X~OjAq6%<)KGtbx*}XZZJ45#!=sx{jeXhOx<9*$CSfitR0;4~k(_M{z*Sq>v_U;eK z?!GC;%xrfZ-5<*7u10_1U40(9zy3(3DB;KAY{LAXNMGdfC8q~3FgBS};P1%@87<-9 zE`%w2Jw4htDvkvKP-3_+2?r+e_jmRAo7vAYMNgoP#vG&$+u{lCujKWWuXk=RwK`JM$B34w1MT9L1_$`gD*s-60n9)b?aIAXx9p`ZXVle^=t$1AYxdR|-!X^O z8G9jn+g`nbX1uqO*H(t~^@)1e%pcTh_ogR%zLnI16O9MWGqJK`I@g;cDaQkn871tj zdUCH`Y4!eDC0~wWpV+GJ2>31z`qMMw7h;!uJGIq3uXBeviAKQh7RUrVqr;=j5%J-` zOMn*vcUB$Vt1q->jg3%GGe;IF%yT(I`Z{y!wu~(t18b z?|DzJQd-X^QK8i#MbFRC`t*DHcTgOgSYxIL)Kk*n_c6Xl1x7#`w*+ zrRBFYGAF;a(dp#hYh*5+JsmY}HqYwn!u1w&EM0CjJz!^y@0mmNjkw;NF61|o_GX=J zjCOVLpW>6huraDL-m)>%!U{0G(Jjnr{L~!Q;&d7>m_;qjWwfB*P3YH>DZ=2mHFNT2 zSfI1S&DyKS9Z@ZHyj|OS-0^_64~dcJ>Jg0grN4-@v|S$z6RUXJtwLacenE} zvAx}M9?&L$s)r(NYWLEpc42qBb|p2g0=t3O*AcY@6z&%bv}Huy0ig&r?gu+S>}}n< zqS_iMrRhF<8K7{Mp$>^af1(;Cx|WBwqkyn5kGq_b0aU!pRYjCpgS3 zH44okoqp4m+6syLAmPNE9FrryAz^pgWjMgSA9ifu&9Mk#qA)@+fq0D|E~?)ecJ9zeWAi0A+@wR?HQ3Jx?xaDaOqaYbx^SVn{l4Kze(fV-{x z?T8f_u?PhQNEsL)(Ux&R&`Si#u#k|93fY!HA=@G*Vi6SOPa`rUKvWPRA_By%M2LU@ zv4#i{4dG%qV)}0v>5IaAcmgkB86y;LJJDfnt&D*qIKSh zu7{r2;wNH}1(BwR_T-6ntJQ*o#v5R}iTxX5i`IUy{{nU`v5yd2w0glV?ukXtCAOyr zY|%Qq2Rk7m?hOt_%u-)*a7dhj9k)>YrwA+9(CR%DNtb$x!$XpUM1i~j1m+_*w+YDV zlmXNN2$N~`65>;x8i4!^h$9vO-^E{yF>J%eh}*soTO#fOHewRpuqhx*89!JADX|rI zf=?RMUVK6J&fAPH$<6q%>J2He9bcB)5&h+U{F&^Xw;_KnH{>I#H>AXtdvd?iS+JqdMn ze+Qp3f1}|Qq}ZZ_PVK%6pE83}OQvu%t`mUF;UJd@Qtnie6I+!OZ0mj(pH>==xM{Z% z!^-1e5M?EDf?pD_mB}sGO63-1<#LOX$s9UnocJ7{GMl4OAxN3dLEb7zna@G45u{A$ zAftj5TeuM<_V8bEfzhZ8XgtwPq}awFsVz1#LD+*7Vl!K9v7N29wV|okAG_bd zr`Xa&ej!M)sX-DXwlzWS6GV!QZ9!sdTWztqt+v|UAg_tIThI$TJWI$;4tkgbvCp%F z-0GlLNf5g|OUMlmdb$L$=d%QDdr)HEe-Uw;r};{PxRGta-lCoVDPp$)c&is+`ZP~T zcxY09wD}JKWB{@I_exZCrTzaI(5UDtKwn>1N&#H}X(top;)f{-JQMTdQ4~%vBOB+_ zs{)6<9I0g+>e)j$&U4nfb6dJJjyz&)GhLm_(d`J7WMYrS9-sVpV&=}rjAzV(q>CSo zu_iqESb!6m13N6UGh>WQyXyE~E9`2*!TTDGrw81xYdw(g8@n@AtXmF3Ymky~IdEC@x3;g1PVumYh5tqFg)*+U1d2648g5E5Y8! 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